Hytec Electronics Ltd.

HDC 2380 64 Channel 24 bit Scaler

Product Description

The HDC 2380 is a 64 channel 24 bit scaler VMEbus module. Each scaler can count from DC up to rates in excess of 10MHz. The unit can be controlled from VME or via its front panel TTL Latch, Veto and Clear signals. The module uses short (A16) addressing. Data transfer types D32 and D16 are supported.

The scalers are equipped with RS-422 inputs. Signals are acceptred via two front panel 68-way mini delta connectors.

The scalers incorporate a ‘read on the fly’ latch which allows the user to read the count without halting the counter. Two modes of latching are provided: standard or pre-inhibit.

Specification

Power Requirements
+5V @ 350mA from the mandatory VME supply.

Front Panel Connectors
A &B – 68-way mini delta
Pins 1-31 (odd) positive RS-422 inputs 0-15
Pins 2-32 (even) negative RS-422 inputs 0-15
Pins 37-67 (odd) positive RS-422 inputs 16-31
Pins 38-68 (even) negative RS-422 inputs 16-31
Pins 33-36 Ground
Latch – Lemo single pole
Schmitt TTL input with 1Kohm to +5V. Logic 0 causes scalers to be latched.
Veto -Lemo single pole
Schmitt TTL input with 1Kohm to +5V. Logic 0 inhibits counting.
Clear – Lemo single pole
Schmitt TTL input with 1Kohm to +5V. Logic 0 clears the counters.

Architecture

The circuitry includes five Xilinx FPGAs: the first decodes and controls VME access, the other four each contain 16 scalers.

Six jumpers set the base address of the unit and an additional two jumpers the FPGA number. Thus if the BA is set to 0xF000 and the FPGAs 0-3 their addresses are 0xF000, 0xF100, 0xF200, 0xF300.

Each slave FPGA then has the following registers

00 ID Read only D16
02 Model Type Read only D16
04 CSR Write/read D16
06 Overflow status Read only D16
0C Scaler channel 0 Read only D32
1C Scaler channel 1 Read only D32 to
FC Scaler channel 15 Read only D32

ID

The ID registers contains the Hytec identifier.

Model Type

This register contains the model type number – 2380

Overflow Register

This register provides the overflow status of each scaler with bit 0 corresponding to scaler 0, bit 1 scaler 1 etc. The register can be cleared by writing a logic 1 to bit 8 of the CSR

CSR

0 Busy A logic 1 indicates module busy - the module is being used.
4 Ready A logic 1 indicates that the module is ready.
8 Overflow set if any of the 16 scalers overflow. Writing a logic 1 to this bit will clear the overflow register.
9 Clear Reads the status of the front panel Clear signal. A logic 1 indicates that a front panel Clear is asserted. Writing a logic 1 will generate a Clear pulse to clear the scalers.
10
Reads the front panel Latch status. A logic 1 indicates that the scalers are latched. Writing a 1 will latch the scalers. The scalers will still count and can be read on the fly.
11
The front panel Veto status can be read; a logic 1 indicating Veto.
12
When set causes Veto to be set just prior to a Latch command.
13
When set causes global operation of the Latch, Clear and Veto bits.
14
Writing a 1 causes all 16 scalers to be incremented. If Global is set all 64 scalers are incremented.

Address Modifiers

AM29 (short non-privileged)

Operating Temperature Range

0 to +45 deg Celsius ambient.

Mechanical

6U single width VME module with access to P1 and P2 connectors.

Our policy is one of continuous product development and the right is reserved to supply equipment which may vary slightly from that described.



Hytec Electronics Ltd
Post : 5 Cradock Road, Reading, Berkshire, RG2 0JT, England.
Phone : +44 (0)118 9757770
Fax : +44 (0)118 9757566

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Copyright © 2004 Hytec Electronics Ltd. All rights reserved.
Information in this document is subject to change without notice.
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Last modified: September 24, 2008